Differential current sense amplifier circuit and sense amplifier circuit for evaluating the memory state of a SRAM semiconductor memory cell

摘要

A differential current evaluation circuit (SBS) has a differential amplifier (DV), and means (MIN, MINB) for adjusting the input resistance of the current evaluation circuit (SBS). These means (MIN, MINB) are connected to the outputs (outp, outn) and the inputs (INN, INP) of said differential amplifier (DV) and with signal lines (BL, BLB) to which the inputs (INN, INP) of the differential amplifier (DV) are electrically connected, respectively. A sense amplifier circuit (LV) comprises a circuit component (ST2), which is constructed such that a signal at the output of the sense amplifier circuit (LV) may be provided continuously in time are available, even if (after deactivation of the upstream circuit, in particular the current evaluation circuit SBS ), at its input is present no, supplied in particular by the current evaluation circuit more signal. The differential current evaluation circuit (SBS) and the sense amplifier circuit (LV) are arranged in a circuit arrangement for reading and evaluating a storage state of a semiconductor memory cell. The current evaluation circuit, by a circuit portion for automatically deactivating (STAD) are activated prior to a read operation, and automatically deactivated immediately upon completion of the read operation.