A semiconductor memory device is provided to shorten a product developing time by easily correcting a change of a fixed circuit, a fixing of a test result, and a test of a circuit. A switching part(100) selectively outputs a test signal or an inverted signal of the test signal in response to a MRS(Mode Register Set) signal as a test input signal. A signal combination part(200) logic-assembles the test input signal and a fuse signal, and outputs a logic-assembled signal. If the MRS signal is disabled, the switching part outputs the test signal as the test input signal. If the MRS signal is enabled, the switching part outputs the inverted signal of the test signal as the test input signal.
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