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Design structure embodied in a machine readable medium for implementing SRAM cell write performance evaluation
Design structure embodied in a machine readable medium for implementing SRAM cell write performance evaluation
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机译:包含在机器可读介质中的用于实现SRAM单元写入性能评估的设计结构
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摘要
A design structure embodied in a machine readable medium for implementing static random access memory (SRAM) cell write performance evaluation is provided. A SRAM core includes each wordline connected to only one bit column. A ring oscillator circuit is used to generate wordline pulses. A state machine controls operations for the SRAM cell write performance evaluation circuit including the ring oscillator circuit and the SRAM core. A control signal is applied to the state machine to select a first write operation, where the circuit simultaneously writes all the cells to a known state with wide wordlines to ensure all cells are written. Then a second write operation is selected, and all the wordlines are launched simultaneously to write the cells to the opposite state. From these write operations, a required wordline pulse width to write the cell is identified.
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