首页> 外国专利> VERTICAL STRUCTURE OF A NON-VOLATILE MEMORY DEVICE, CAPABLE OF IMPROVING THE CONTROLLING RELIABILITY OF STRING-SELECTION TRANSISTORS, MEMORY CELLS, AND GROUND-SELECTION TRANSISTORS

VERTICAL STRUCTURE OF A NON-VOLATILE MEMORY DEVICE, CAPABLE OF IMPROVING THE CONTROLLING RELIABILITY OF STRING-SELECTION TRANSISTORS, MEMORY CELLS, AND GROUND-SELECTION TRANSISTORS

机译:非挥发性存储设备的垂直结构,能够提高选弦晶体管,存储单元和接地选择晶体管的控制可靠性

摘要

PURPOSE: The vertical structure of a non-volatile memory device is provided to reduce the length of the gate of ground-selection gate electrodes by forming two or more string-selection transistors.;CONSTITUTION: A semiconductor pillar is vertically expanded to the upper side of a substrate. A NAND string(NS) is vertically expanded to the upper side of the substrate along the sidewall of the semiconductor pillar. The NAND string includes first selection transistors(TG1, TG2) which are adjacently arranged on one side of plurality of memory cells(MC). A plurality of word-lines(WL0 to WLn) is combined to a plurality of memory cells of the NAND string. A first selection line is commonly combined to the first selection transistors of the NAND string.;COPYRIGHT KIPO 2010
机译:目的:提供一种非易失性存储器件的垂直结构,以通过形成两个或更多的串选择晶体管来减小接地选择栅电极的栅极长度。组成:半导体柱垂直扩展到上侧基材的数量。 NAND串(NS)沿着半导体柱的侧壁垂直地扩展到基板的上侧。 NAND串包括第一选择晶体管(TG1,TG2),第一选择晶体管(TG1,TG2)相邻地布置在多个存储单元(MC)的一侧上。多个字线(WL0至WLn)被组合到NAND串的多个存储单元。通常将第一选择线与NAND串的第一选择晶体管组合。; COPYRIGHT KIPO 2010

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