All-Digital Phase Locked Loop For Reduced Spur and Method of Generating an Oscillation Signal Using the Same

摘要

all-digital PLL El (All-Digital Phase Locked Loop) is a digitally controlled oscillator, Retimer feedback route, the sigma-delta modulator, and a reference phase accumulation unit, a digital loop filter and the phase difference detection section. A digitally controlled oscillator in response to a control signal, generates an oscillation signal of a frequency corresponding to the control signal. The re-timer is re-timing the reference clock based on the oscillation signal. The feedback path produces a phase information of the oscillation signal in synchronization with the reference clock count and accumulates the clock re-timing of the oscillation signal. The sigma-delta modulator includes a frequency command signal sigma-delta modulation, and outputs the modulation signal having a bit number smaller than the bit number of the frequency command signal. The reference phase accumulation unit accumulates the phase corresponding to the modulated signal. The phase difference detecting section generates the phase information by detecting the difference between phase information of the reference phase accumulating an output signal of the oscillation signal. The digital loop filter filters the phase difference information to generate a control signal.