Fractional spur reduction technique using 45° phase dithering in phase interpolator based all-digital phase-locked loop

摘要

A spur reduction technique in fractional-N phase-locked loops based on a current-mode phase interpolator (CMPI) is presented by dithering input signals of the CMPI. CMPI shows deterministic phase error having symmetrical profile around 45° offset in each quadrant, and this non-linear property leads to fractional spurs. The proposed 45° phase rotator with digital compensation reduces the fractional spur by 18.57 dB at most, and average improvement of fractional tones is 7.89 dB in 2 MHz frequency step measurement.