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Method of fabricating ultra-deep vias and three-dimensional integrated circuits using ultra-deep vias

机译:使用超深通孔制造超深通孔和三维集成电路的方法

摘要

A method of forming a high aspect ratio via opening through multiple dielectric layers, a high aspect ratio electrically conductive via, methods of forming three-dimension integrated circuits, and three-dimensional integrated circuits. The methods include forming a stack of at least four dielectric layers and etching the first and third dielectric layers with processes selective to the second and fourth dielectric layers, etching the second and third dielectric layers with processes selective to the first and second dielectric layers. Advantageously the process used to etch the third dielectric layer is not substantially selective to the first dielectric layer.
机译:一种形成穿过多个介电层的开口的高纵横比的方法,高纵横比的导电通孔,形成三维集成电路的方法和三维集成电路。所述方法包括形成至少四个电介质层的堆叠,并通过对第二和第四电介质层具有选择性的工艺来蚀刻第一和第三电介质层,通过对第一和第二电介质层具有选择性的工艺来蚀刻第二和第三电介质层。有利地,用于蚀刻第三介电层的工艺对第一介电层基本上不具有选择性。

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