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Performance in transistors with a metal gate stack with a large ε by means of an early implantation of the extension regions

机译:通过早期注入扩展区,在具有大ε的金属栅叠层的晶体管中的性能

摘要

In complex transistor cells, the integrity of the sensitive gate materials is improved, while at the same time, the lateral spacing of enlargement regions is reduced. For this purpose, at least a part of the implanted extension regions in an early process step, i.e. in the presence of a protection coating material which, according to the production of the extension regions is structured in a protective spacer structure for preserving the integrity of the sensitive gate electrodes structure is used.
机译:在复杂的晶体管单元中,提高了敏感栅材料的完整性,同时减小了扩大区域的横向间距。为此,在早期处理步骤中,即在存在保护涂层材料的情况下,至少一部分被植入的延伸区域,根据延伸区域的生产,该保护涂层材料被构造成保护间隔物结构,用于保持膜的完整性。使用灵敏的栅电极结构。

著录项

  • 公开/公告号DE102009047313A1

    专利类型

  • 公开/公告日2011-06-01

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE20091047313

  • 发明设计人

    申请日2009-11-30

  • 分类号H01L21/336;H01L29/78;H01L21/265;H01L21/31;H01L21/8234;

  • 国家 DE

  • 入库时间 2022-08-21 17:47:39

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