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PATTERN ARRANGEMENT METHOD AND SILICON WAFER AND SEMICONDUCTOR DEVICE
PATTERN ARRANGEMENT METHOD AND SILICON WAFER AND SEMICONDUCTOR DEVICE
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机译:图案布置方法以及硅晶片和半导体器件
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摘要
PROBLEM TO BE SOLVED: To provide a pattern arrangement method which is less susceptible to fracture when a plurality of same patterns are formed on a silicon wafer in semiconductor lithography, and to provide a patterned silicon wafer, and a semiconductor device in which the pattern arrangement method is used.;SOLUTION: The silicon wafer has a plurality of chip patterns arranged in parallel in a first direction and a second direction perpendicular to the first direction. The plurality of chip patterns includes one or more patterns arranged linearly in the first direction and second direction. The plurality of chip patterns are arranged so that the orthogonal axis of a cleavage surface of the silicon wafer and the surface of the silicon wafer where the patterns are arranged is different from the first direction.;COPYRIGHT: (C)2012,JPO&INPIT
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