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PATTERN ARRANGEMENT METHOD, SILICON WAFER AND SEMICONDUCTOR DEVICE USING A SILICON WAFER WITH A PATTERN ARRANGEMENT
PATTERN ARRANGEMENT METHOD, SILICON WAFER AND SEMICONDUCTOR DEVICE USING A SILICON WAFER WITH A PATTERN ARRANGEMENT
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机译:图案排列方法,硅晶片和使用具有图案排列的硅晶片的半导体器件
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摘要
A silicon wafer includes a plurality of chip patterns arranged parallel to a first direction and a second direction intersecting the first direction, wherein the plurality of chip patterns include one or more patterns arranged in the first direction and the second direction in a straight line, the plurality of chip patterns include a first chip pattern and a second chip pattern adjacent to the first chip pattern, and the second chip pattern is arranged by rotating the first chip pattern at 90 degrees, the plurality of chip patterns are arranged so that an axis in which a cleavage plane of the silicon wafer and a surface arranged with the pattern on the silicon wafer intersect, and the first direction are different, and an angle between the axis and the first direction of the second chip pattern is 90 degrees.
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