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DRAM fabricated on silicon (SOI) on-insulator substrate having a two digit line hierarchy, DRAM array, and a method of manufacturing the same
DRAM fabricated on silicon (SOI) on-insulator substrate having a two digit line hierarchy, DRAM array, and a method of manufacturing the same
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机译:具有两位线层次的在绝缘体上硅上制造的DRAM,DRAM阵列及其制造方法
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摘要
DRAM which possesses two hierarchical digital lines is formed on the silicon SOI baseplate on the insulator. Compared to in detail, the digital line in each complimentary digital line pair, is arranged with respect to opposite side of the SOI baseplate. In one execution form, the digital line, is formed between the memory cell capacitors (67 and 68), the digital line is formed to the upper part of the capacitor in 2nd execution form. It is produced on the SOI baseplate and DRAM array has with the plural digital line pairs which extend according to each line of plural memory cells and the memory cell which are arranged in active silicon layer of the baseplate and the plural access transistors which are produced in active silicon layer. Selective figure Figure 8
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