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Analysis of sense margin and reliability of 1T-DRAM fabricated on thin-film UTBOX substrates

机译:薄膜UTBOX基材上1T-DRAM的感测余量和可靠性分析

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The floating body RAM is a very promising candidate for further downscaling of memory cells [1,2]. Amongst the different SOI-based device architectures, Ultra-Thin BOX (UTBOX) SOI devices have gained a lot of interest recently [3]. As the buried oxide (BOX) thickness is scaled down, a low-voltage back bias can be used to increase the sense margin. In this work, we will first discuss the impact of back biasing on the sense margin in both doped and undoped devices. As the floating body memory cell requires the use of impact ionization or Gate Induced Drain Leakage (GIDL) [4] to program state "1", reliability is a concern. Therefore, the second part of this paper will be devoted to the reliability study.
机译:浮体RAM是一个非常有前途的候选者,用于进一步缩小存储器单元[1,2]。在不同的基于SOI的设备架构中,超薄盒子(UTBOX)SOI设备最近获得了很多感兴趣[3]。随着掩埋氧化物(盒子)厚度缩小,低压背面偏压可用于增加感测余量。在这项工作中,我们将首先讨论背部偏置对掺杂和未掺杂设备的感觉边距的影响。由于浮体存储器单元需要使用冲击电离或栅极诱导的漏极泄漏(GID1)[4]来编程状态“1”,可靠性是一个问题。因此,本文的第二部分将致力于可靠性研究。

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