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Isolation structures for SOI devices with ultrathin SOI and ultrathin box

机译:具有超薄SOI和超薄盒的SOI器件的隔离结构

摘要

Shallow trenches are formed around a vertical stack of a buried insulator portion and a top semiconductor portion. A dielectric material layer is deposited directly on sidewalls of the top semiconductor portion. Shallow trench isolation structures are formed by filling the shallow trenches with a dielectric material such as silicon oxide. After planarization, the top semiconductor portion is laterally contacted and surrounded by the dielectric material layer. The dielectric material layer prevents exposure of the handle substrate underneath the buried insulator portion during wet etches, thereby ensuring electrical isolation between the handle substrate and gate electrodes subsequently formed on the top semiconductor portion.
机译:在掩埋的绝缘体部分和顶部半导体部分的垂直堆叠周围形成浅沟槽。电介质材料层直接沉积在顶部半导体部分的侧壁上。通过用诸如氧化硅的介电材料填充浅沟槽来形成浅沟槽隔离结构。在平坦化之后,顶部半导体部分横向接触并且被电介质材料层围绕。介电材料层防止在湿法刻蚀期间掩埋绝缘体部分下方的操作衬底暴露,从而确保在操作衬底与随后在顶部半导体部分上形成的栅电极之间的电隔离。

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