LAYOUT METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT, LAYOUT PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND LAYOUT DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a layout method for a semiconductor integrated circuit allowing efficient arrangement of a function block, a layout program of a semiconductor integrated circuit, and a layout device for a semiconductor integrated circuit.;SOLUTION: The layout method for a semiconductor integrated circuit includes: a classification step of classifying a plurality of blocks into block groups each receiving the same clock signal, and combining one or the plurality of blocks included in the block group so that a unit block having a size equal to or smaller than the size of the largest block is generated; a first arrangement step of arranging the unit block in the block group adjacent to each other; and a second arrangement step of determining whether a wire length to an input terminal connected to each of the blocks is longer than the reference distance satisfying a timing constraint condition, and exchanging the arrangement between the blocks so that the first block having the wire length longer than the reference distance satisfies the timing constraint condition, based on information of an arrangeable area satisfying the timing constraint condition of the first block.;COPYRIGHT: (C)2014,JPO&INPIT