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SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS
SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS
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机译:高级晶体管的源/漏扩展控制
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摘要
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1×1019 atoms/cm3, or alternatively, less than one-quarter the dopant concentration of the source and the drain.
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机译:具有改进性能的平面晶体管在半导体衬底上具有源极和漏极,该半导体衬底包括在源极和漏极之间延伸的基本上未掺杂的沟道。栅极位于衬底上的基本上未掺杂的沟道上方。注入的源极/漏极延伸部分与源极和漏极接触,注入的源极/漏极延伸部分的掺杂浓度小于1×10 19 Sup> atoms / cm 3 Sup>,或者,小于源极和漏极的掺杂剂浓度的四分之一。
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