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BEOL integration scheme for copper CMP to prevent dendrite formation

机译:铜CMP的BEOL集成方案可防止枝晶形成

摘要

Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices by performing a copper deposition process to fill the trench or via with copper, which can be performed by fill, plating or electroless deposition. Copper clearing of copper overburden is performed using CMP to stop on an existing liner. Copper in the trenches or vias is recessed by controlled etch. An Nblok cap layer is deposited to cap the trenches or vias so that copper is not exposed to ILD. Nblok overburden and adjacent liner is then removed by CMP. Nblok cap layer is then deposited. The proposed approach is an alternative CMP integration scheme that will eliminate the exposure of copper to ILD during CMP, will prevent any dendrite formation, can be used for all metal layers in BEOL stack, and can be utilized for multiple layers, as necessary, whenever copper CMP is desired.
机译:本文公开了通过执行铜沉积工艺以用铜填充沟槽或通孔来在集成电路器件上形成铜基导电结构的各种方法,其可以通过填充,电镀或化学沉积来执行。使用CMP清除铜覆盖层以停止在现有衬管上。通过控制蚀刻使沟槽或通孔中的铜凹陷。沉积Nblok覆盖层以覆盖沟槽或过孔,以使铜不会暴露于ILD。 Nblok覆盖层和相邻的衬层然后通过CMP去除。然后沉积Nblok盖层。提议的方法是一种替代的CMP集成方案,该方案将消除CMP过程中铜对ILD的暴露,防止任何枝晶的形成,可用于BEOL堆叠中的所有金属层,并在必要时可用于多层需要铜CMP。

著录项

  • 公开/公告号US8669176B1

    专利类型

  • 公开/公告日2014-03-11

    原文格式PDF

  • 申请/专利权人 KUNALJEET TANWAR;

    申请/专利号US201213596198

  • 发明设计人 KUNALJEET TANWAR;

    申请日2012-08-28

  • 分类号H01L21/4763;

  • 国家 US

  • 入库时间 2022-08-21 16:03:40

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