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Memory cells having a row-based read and/or write support circuitry
Memory cells having a row-based read and/or write support circuitry
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机译:具有基于行的读和/或写支持电路的存储单元
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摘要
A method of controlling a plurality of memory cells in a row. The method includes controlling a switching element using at least one write word line signal to raise a voltage of a node connected to the plurality of memory cells in the row when the plurality of memory cells in the row operate in a first mode. The method further includes controlling at least one transistor using the at least one write word line signal to connect the plurality of memory cells in the row to a reference voltage when the plurality of memory cells in the row operate in a second mode.
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