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Method of manufacturing a device of the field effect transistor is implemented on an array of nanowires vertical, the device of the transistor, electronic device comprising such devices of the transistors, and processor comprising at least such an electronic device
Method of manufacturing a device of the field effect transistor is implemented on an array of nanowires vertical, the device of the transistor, electronic device comprising such devices of the transistors, and processor comprising at least such an electronic device
A process for fabricating a field-effect transistor device (20) implemented on a network of vertical nanowires (24), includes: producing a source electrode (26) and a drain electrode (30) at each end of each nanowire (24) symmetrically relative to the gate electrode of each elementary transistor implemented on a nanowire; creating a gate electrode by depositing a layer (38) of conductive material around a layer (36) of dielectric material that surrounds a portion of each nanowire (24), a single conductive layer (38) being used for all of the nanowires and the thickness of the conductive layer corresponding to the gate length of the transistor device; and insulating each electrode with a planar layer (32, 34) of a dielectric material in order to form a nanoscale gate and in order to insulate the contacts of each elementary transistor between the gate and the source and the gate and the drain.
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