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Dicing method for wafer level packaging and semiconductor chip having dicing structure adapted to wafer level packaging
Dicing method for wafer level packaging and semiconductor chip having dicing structure adapted to wafer level packaging
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机译:晶圆级封装的切割方法以及具有适合晶圆级封装的切割结构的半导体芯片
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摘要
A semiconductor substrate (1) is provided with integrated circuits. Dicing trenches (7) are formed in the substrate (1) between the integrated circuits, a polyimide layer (8) spanning the trenches (7) is applied above the integrated circuits, a tape layer (14) is applied above the polyimide layer (8), and a layer portion of the substrate (1) is removed from the substrate side (17) opposite the tape layer (14), until the trenches (7) are opened and dicing of the substrate (1) is thus effected. The polyimide layer (8) is severed in sections (18) above the trenches (7) when the tape layer (14) is removed. The semiconductor chip is provided with a cover layer (11) laterally confining the polyimide layer (8) near the trenches (7), in particular for forming breaking delimitations (9).
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