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Mitigating Write Disturbance in Dual Port 8T SRAM
Mitigating Write Disturbance in Dual Port 8T SRAM
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机译:减轻双端口8T SRAM中的写干扰
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摘要
The independent claims of this patent signify a concise description of embodiments. Disclosed is technology for reducing write disturbance while writing data into a first SRAM cell and accessing a second SRAM cell in a row of SRAM cells. This Abstract is not intended to limit the scope of the claims.
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