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METHOD AND ASSEMBLY FOR MITIGATING SHORT CHANNEL EFFECTS IN SILICON CARBIDE MOSFET DEVICES

机译:缓和碳化硅MOSFET器件中短通道效应的方法和组件

摘要

A power transistor assembly and method of mitigating short channel effects in a power transistor assembly are provided. The power transistor assembly includes a first layer of semiconductor material formed of a first conductivity type material and a hard mask layer covering at least a portion of the first layer and having a window therethrough exposing a surface of the first layer. The power transistor assembly also includes a first region formed in the first layer of semiconductor material of a second conductivity type material and aligned with the window, one or more source regions formed of first conductivity type material within the first region and separated by a portion of the first region, and an extension of the first region extending laterally through the surface of the first layer.
机译:提供了一种功率晶体管组件和减轻功率晶体管组件中的短沟道效应的方法。功率晶体管组件包括由第一导电类型的材料形成的半导体材料的第一层和覆盖第一层的至少一部分并且具有穿过其的窗口以暴露第一层的表面的硬掩模层。功率晶体管组件还包括:第一区域,其形成在第二导电类型的材料的第一半导体材料层中并与窗口对准;一个或多个源区域,其在第一区域内由第一导电类型的材料形成,并且由一部分隔离。第一区域,以及第一区域的延伸部横向延伸穿过第一层的表面。

著录项

  • 公开/公告号US2019140047A1

    专利类型

  • 公开/公告日2019-05-09

    原文格式PDF

  • 申请/专利权人 MICROSEMI CORPORATION;

    申请/专利号US201816181051

  • 申请日2018-11-05

  • 分类号H01L29/06;H01L29/16;H01L29/417;H01L29/66;H01L29/78;

  • 国家 US

  • 入库时间 2022-08-21 12:04:45

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