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METHOD AND ASSEMBLY FOR MITIGATING SHORT CHANNEL EFFECTS IN SILICON CARBIDE MOSFET DEVICES
METHOD AND ASSEMBLY FOR MITIGATING SHORT CHANNEL EFFECTS IN SILICON CARBIDE MOSFET DEVICES
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机译:缓和碳化硅MOSFET器件中短通道效应的方法和组件
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摘要
A power transistor assembly and method of mitigating short channel effects in a power transistor assembly are provided. The power transistor assembly includes a first layer of semiconductor material formed of a first conductivity type material and a hard mask layer covering at least a portion of the first layer and having a window therethrough exposing a surface of the first layer. The power transistor assembly also includes a first region formed in the first layer of semiconductor material of a second conductivity type material and aligned with the window, one or more source regions formed of first conductivity type material within the first region and separated by a portion of the first region, and an extension of the first region extending laterally through the surface of the first layer.
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