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Building blocks of vertical GaN-based devices

机译:垂直GaN基器件的构建块

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摘要

Gallium nitride (GaN) is a promising candidate to substitute silicon in high-voltage and high-power applications. Due to its large bandgap, GaN exhibits a thousand times higher breakdown voltages than silicon for comparable on-resistance. Furthermore, heterostructure field effect transistors (HFET) based on the two-dimensional electron gas (2DEG) induced at the interface of AlGaN and GaN allow high current densities and switching speeds. Up to now, mostly lateral GaN-based HFET have been investigated. An enhancement in breakdown voltage is mainly achieved by increasing the gate-drain separation. This increase in lateral dimensions raises the chip size and thus costs. Another approach to yield higher breakdown voltages is the transition to vertical devices. Here, the drain contact is located at the backside of the structure. Hence, a separation of the gate and drain electrode through the total device thickness is achieved.In this thesis, vertical HFET relying on the current aperture vertical transistor (CAVET) concept are investigated. This device applies a 2DEG as channel and uses a thick n-doped drift region to block high voltages. A current blocking layer (CBL) with an aperture underneath the gate is introduced into the structure to guide the current from the top-side source to the bottom drain. Typically, the CBL can be realized with a buried insulating or p-doped GaN layer.The thesis comprises a comprehensive simulation of growth- and process-related parameters. Hereby, design rules for doping concentrations of each layer and lateral and vertical dimensions of the device are deduced in order to target an optimum trade-off between on-resistance and breakdown voltage.The fabrication of a CAVET encompasses several building blocks which were investigated separately before they were combined in a fully working device. Particularly, the drift region was optimized in order to obtain a high breakdown voltage and low on-resistance. The CBL was realized with an Mg-doped p-GaN layer. This yielded a sufficient blocking voltage and temperature stability above 1050 °C. To generate the 2DEG on top of the CBL, a regrowth of the AlGaN/GaN heterostructure is necessary. However, the management of the regrowth interface is one of the main challenges of the CAVET. Therefore, regrowth on various templates was performed to gain fundamental understanding of its characteristics. Even MOCVD regrowth on as-grown GaN templates already showed significant impact on the electrical characteristics of test devices. The regrowth on an etched surface, as needed in a complete CAVET process, led to a severe leakage current at the regrowth interface. Furthermore, for the regrowth on the CBL, only a low-temperature process, preferably with MBE, was found advantageous to suppress Mg-diffusion. Another challenge in processing a CAVET is the regrowth on textured and masked templates. Hereby, different routes to planarize etched trenches were investigated.Based on the results of each of the building blocks and the simulations, CAVET were processed. A CAVET with p-GaN CBL and MOCVD regrowth of the AlGaN/GaN heterostructure showed a high on-resistance, attributed to a large aperture resistance caused by Mg out-diffusion. However, also excellent breakdown voltages of 140 V were obtained. In conjunction with the thickness of the drift region of 1 µm, this results in a breakdown field of 3 MV/cm, close to the theoretical maximum.For the second device, low-temperature MBE regrowth was performed on the p-GaN CBL. For this CAVET, high on-currents were achieved and an on-resistance as low as 2 mΩcm2 was realized. However, high leakage currents prevented a large breakdown voltage.In summary, the successful realization of vertical GaN-based HFET has been shown. So far, the presented devices either showed large on-resistance and excellent breakdown voltage or good on-state characteristics and high leakage currents. From the insights gained by the investigation of the single building blocks and the simulations, further improvement of vertical devices on the way to high-power applications is expected.
机译:氮化镓(GaN)是在高电压和高功率应用中替代硅的有希望的候选人。由于具有较大的带隙,GaN的击穿电压是硅的千倍,具有相当的导通电阻。此外,基于在AlGaN和GaN的界面处感应的二维电子气(2DEG)的异质结构场效应晶体管(HFET),可以实现高电流密度和高开关速度。迄今为止,已经研究了大多数基于横向GaN的HFET。击穿电压的提高主要是通过增加栅漏间距来实现的。横向尺寸的增加增加了芯片尺寸,从而增加了成本。产生更高击穿电压的另一种方法是过渡到垂直器件。此处,漏极触点位于结构的背面。因此,实现了栅电极和漏电极在整个器件厚度上的分离。本文研究了基于电流孔径垂直晶体管(CAVET)概念的垂直HFET。该器件将2DEG用作通道,并使用厚的n掺杂漂移区来阻止高电压。在栅极下方具有开孔的电流阻挡层(CBL)被引入结构中,以将电流从顶侧源极引导至底侧漏极。通常,CBL可以通过掩埋绝缘层或p掺杂GaN层来实现。本文包括与生长和工艺相关的参数的全面模拟。因此,推导了设计每一层的掺杂浓度以及器件的横向和纵向尺寸的设计规则,以实现导通电阻和击穿电压之间的最佳权衡。CAVET的制造包含几个构件,分别进行了研究。在将它们组合成完全工作的设备之前。特别地,漂移区被优化以便获得高击穿电压和低导通电阻。用Mg掺杂的p-GaN层实现CBL。这产生了足够的阻断电压和1050°C以上的温度稳定性。为了在CBL顶部生成2DEG,必须重新生长AlGaN / GaN异质结构。但是,对再生接口的管理是CAVET的主要挑战之一。因此,对各种模板进行了再生,以基本了解其特性。甚至已生长的GaN模板上的MOCVD再生长也已经对测试设备的电气特性产生了重大影响。根据完整CAVET工艺的需要,蚀刻表面上的再生长会在再生长界面处导致严重的泄漏电流。此外,对于CBL上的再生,仅发现低温工艺,优选使用MBE,有利于抑制Mg扩散。处理CAVET的另一个挑战是纹理和蒙版模板的重新生成。因此,研究了平坦化刻蚀沟槽的不同途径。基于每个构造块的结果和模拟,对CAVET进行了处理。具有p-GaN CBL和MOCVD再生AlGaN / GaN异质结构的CAVET显示出高导通电阻,这归因于Mg向外扩散引起的大孔径电阻。但是,也获得了140V的出色击穿电压。结合1μm的漂移区厚度,导致击穿场为3 MV / cm,接近理论最大值。对于第二个器件,在p-GaN CBL上进行了低温MBE再生长。对于这种CAVET,实现了高导通电流,并且实现了低至2mΩcm2的导通电阻。然而,高泄漏电流阻止了较大的击穿电压。综上所述,已经成功实现了垂直GaN基HFET的成功实现。到目前为止,提出的器件要么显示出较大的导通电阻,出色的击穿电压,要么显示出良好的导通状态特性以及高漏电流。从对单个构件的研究和仿真中获得的见解,可以预见垂直设备在大功率应用方面的进一步改进。

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    Witte Wiebke;

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  • 年度 2016
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  • 原文格式 PDF
  • 正文语种 eng
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