Single event gate rupture in thin gate oxides

摘要

As integrated circuit densities increase with each new technology generation, both the lateral and vertical dimensions shrink. Oxide electric fields are in fact increasing to greater than 5 MV/cm as feature size approaches 0.1 micrometers. This trend raises the concern that single event gate rupture (SEGR) may limit the scaling of advanced integrated circuits (ICs) for space applications. The dependence of single event gate rupture (SEGR) critical field on oxide thickness is examined for thin gate oxides. Critical field for SEGR increases with decreasing oxide thickness, consistent with an increasing intrinsic breakdown field.