首页> 外国专利> METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE PREVENTING THINNING OF THICK GATE OXIDE LAYER IN DUAL GATE OXIDE LAYER

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE PREVENTING THINNING OF THICK GATE OXIDE LAYER IN DUAL GATE OXIDE LAYER

机译:制造防止双栅氧化层中厚栅氧化层变薄的半导体器件的方法

摘要

PURPOSE: A method for manufacturing a semiconductor device is provided to improve GOI(Gate Oxide Integrity) and HCE(Hot Carrier Effect) by preventing thinning of a thick gate oxide layer in a dual gate oxide layer. CONSTITUTION: A first gate structure including a thick gate oxide layer(37a) and a first gate electrode(37a), and a second gate structure including a sacrificial gate oxide layer and a sacrificial gate electrode are simultaneously formed on a substrate(31) defined by a thick oxide region(I) and a thin oxide region(II). A spacer(39) is formed at both sidewalls of the first and second gate structure. A first interlayer dielectric is formed on the resultant structure. A trench is formed by selectively etching the interlayer dielectric on the second gate structure. A thin gate oxide layer(47) is formed on the bottom of the trench. A second gate electrode(49a) is formed on the thin gate oxide layer. Then, a second interlayer dielectric(51) is formed on the resultant structure.
机译:目的:提供一种用于制造半导体器件的方法,以通过防止双栅氧化物层中的厚栅氧化物层变薄来改善GOI(栅氧化物完整性)和HCE(热载流子效应)。组成:在限定的基板(31)上同时形成包括厚栅氧化层(37a)和第一栅电极(37a)的第一栅结构以及包括牺牲栅氧化层和牺牲栅电极的第二栅结构通过厚的氧化物区域(I)和薄的氧化物区域(II)。在第一栅极结构和第二栅极结构的两个侧壁处都形成有间隔物(39)。在所得结构上形成第一层间电介质。通过选择性地蚀刻第二栅极结构上的层间电介质来形成沟槽。在沟槽的底部上形成薄的栅氧化物层(47)。在薄栅氧化层上形成第二栅电极(49a)。然后,在所得结构上形成第二层间电介质(51)。

著录项

  • 公开/公告号KR20050000054A

    专利类型

  • 公开/公告日2005-01-03

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20030040613

  • 发明设计人 PARK MYOUNG KYU;

    申请日2003-06-23

  • 分类号H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 22:06:09

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