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Pushing the Material Limits in High Kappa Dielectrics on High Carrier Mobility Semiconductors for Science/Technology Beyond Si CMOS and More.

机译:推动高Kappa电介质的材料限制,用于超过si CmOs等的科学/技术的高载流子迁移率半导体。

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Our research activities during the last eight years from 2006 to 2013, with the grant supports from Nano National programs, NSC, Taiwan and AOARD, have been pushing the material limits of III-V InGaAs and GaN metal- oxide-semiconductor (MOS) systems using high-k dielectrics. In the third year of the funding, with the capabilities of atomic-scale probing and manipulating the high-k oxides/semiconductors interfaces, we have established the correlations between electronic structures and electrical properties essential to understand the Fermi level pinning/unpinning mechanism of the interfaces between metal/oxide and oxide/semiconductor. we have successfully continuously kept our world-leading expertise of high-k dielectric growth on InGaAs by achieving world record drain current of 1.8 mA/micro m, transconductance of 0.80 mS/micro m, and low sub-thresholds in a self-aligned inversion-channel InGaAs metal-oxide-semiconductor field-effect- transistor of 1 micro m gate length. In-situ ultrahigh vacuum deposited Y2O3 and HfO2 and atomic-layer- deposited (ALD) Al2O3 and HfO2 2-3 mono-layers thick on freshly grown In0.53Ga0.47As, with an Al2O3 cap, were employed as a gate dielectric.

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