Effect of Elevated Temperature on Latchup and Bit Errors in CMOS (Complementary Metal Oxide Semiconductor) Devices.

摘要

Equipment for testing microcircuits at elevated temperatures for Single Event Phenomena (SEP) such as upset (SEU) and latchup (SEL) has been developed, and measurements on several device types have been performed. Very large changes in cross section and threshold Linear Energy Transfer (LET) have been observed over the temperature range of 25 C to 120 C for SEU and SEL.