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A memristor-based nonvolatile latch circuit

机译:基于忆阻器的非易失性锁存电路

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Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal–oxide–semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.
机译:表现出取决于激励历史的动态电导状态的忆阻器件可以通过将信息存储为不同的电导状态而用作非易失性存储元件。我们描述了使用纳米级忆阻器件作为非易失性存储元件的非易失性同步触发器电路的实现。电路的受控测试表明,在1000次掉电事件中,状态存储和恢复成功,错误率达0.1%。这些结果表明,数字逻辑设备和忆阻器的集成可以为依赖于间歇性电源的小型平台中的应用打开非易失性计算的方式。这证明了忆阻器与CMOS(互补金属氧化物半导体)电路紧密集成的可行性挑战了传统的存储器层次结构,在非易失性存储器中,非易失性存储器仅作为层次结构底部的大型,缓慢的整体块可用。相比之下,基于忆阻器的非易失性存储单元可以快速,精细且体积小,并且与常规CMOS电子设备兼容。这可能会扰乱传统的内存层次结构,并可能在此基础上开拓新的架构可能性。

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