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Nonvolatile latch circuit, nonvolatile flip-flop circuit, and nonvolatile signal processing device

机译:非易失性锁存电路,非易失性触发器电路和非易失性信号处理装置

摘要

A nonvolatile latch circuit according to the present invention includes: a latch operating unit in which outputs of cross-coupled connected inverter circuit and inverter circuit are connected via a series circuit which includes a transistor, a variable resistance element, and a transistor in this order, and store and restore in a latch state are controlled by control terminals of the transistors; and a comparator circuit which compares a signal obtained by amplifying the value of the sum of potentials at both ends of the variable resistance element with the logic state of the latch operating unit, wherein writing to and reading from the variable resistance element are repeated until an output of the comparator circuit indicates that normal write operation has been performed.
机译:根据本发明的非易失性闩锁电路包括:闩锁操作单元,其中交叉耦合连接的反相器电路和反相器电路的输出经由串联电路连接,该串联电路依次包括晶体管,可变电阻元件和晶体管。以及在锁存状态下的存储和恢复由晶体管的控制端控制;以及比较器电路,其比较通过将可变电阻元件的两端的电位之和的值与锁存器操作单元的逻辑状态进行放大而获得的信号,其中重复对可变电阻元件的写入和读取直到直到比较器电路的输出表明已经执行了正常的写操作。

著录项

  • 公开/公告号US8792268B2

    专利类型

  • 公开/公告日2014-07-29

    原文格式PDF

  • 申请/专利权人 PANASONIC CORPORATION;

    申请/专利号US201213881077

  • 发明设计人 YOSHIKAZU KATOH;

    申请日2012-11-08

  • 分类号G11C14/00;

  • 国家 US

  • 入库时间 2022-08-21 16:02:02

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