首页> 外国专利> NONVOLATILE LATCH CIRCUIT, NONVOLATILE FLIP-FLOP CIRCUIT AND NONVOLATILE SIGNAL PROCESSING DEVICE

NONVOLATILE LATCH CIRCUIT, NONVOLATILE FLIP-FLOP CIRCUIT AND NONVOLATILE SIGNAL PROCESSING DEVICE

机译:非易失性闩锁电路,非易失性跳动电路和非易失性信号处理装置

摘要

The nonvolatile latch circuit (100) according to the present invention is equipped with: a latching operation unit in which outputs of cross-coupled inverters (20, 21) are connected together via a series circuit which is constructed with a transistor (6), a variable resistance component (1), and a transistor (7) in said order, and storing and restoring of a latched state are controlled through control terminals of the transistors (6 and 7); and a comparator circuit (23) that compares a signal which is obtained by amplifying the sum of the potentials on either side of the variable resistance component (1) with a logical state of the latching operation unit. Writing to and reading from the variable resistance component (1) are repeated until the output of the comparator circuit (23) indicates an execution of normal writing.
机译:根据本发明的非易失性闩锁电路(100)具备:闩锁运算单元,其中,交叉耦合的反相器(20、21)的输出经由由晶体管(6)构成的串联电路连接在一起,通过所述晶体管(6和7)的控制端子来控制可变电阻元件(1)和晶体管(7)的顺序,以及锁存状态的存储和恢复。比较器电路(23)将通过将可变电阻元件(1)的任一侧的电位之和放大而得到的信号与锁存运算单元的逻辑状态进行比较。重复对可变电阻元件(1)进行写入和读取,直到比较器电路(23)的输出指示执行正常写入为止。

著录项

  • 公开/公告号WO2013076928A1

    专利类型

  • 公开/公告日2013-05-30

    原文格式PDF

  • 申请/专利权人 PANASONIC CORPORATION;

    申请/专利号WO2012JP07193

  • 发明设计人 加藤 佳一;

    申请日2012-11-08

  • 分类号H03K3/356;H01L21/8247;H01L27/10;H01L27/105;H01L27/115;H03K3/037;

  • 国家 WO

  • 入库时间 2022-08-21 16:32:53

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