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A statistical-based material and process guidelines for design of carbon nanotube field-effect transistors in gigascale integrated circuits

机译:基于统计的材料和工艺指南,用于千兆集成电路中的碳纳米管场效应晶体管设计

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摘要

Carbon nanotube field-effect transistors (CNFETs) show great promise as building blocks of future integrated circuits. However, synthesizing single-walled carbon nanotubes (CNTs) with accurate chirality and exact positioning control has been widely acknowledged as an exceedingly complex task. Indeed, density and chirality variations in CNT growth can compromise the reliability of CNFET-based circuits. In this paper, we present a novel statistical compact model to estimate the failure probability of CNFETs to provide some material and process guidelines for the design of CNFETs in gigascale integrated circuits. We use measured CNT spacing distributions within the framework of detailed failure analysis to demonstrate that both the CNT density and the ratio of metallic to semiconducting CNTs play dominant roles in defining the failure probability of CNFETs. Besides, it is argued that the large-scale integration of these devices within an integrated circuit will be feasible only if a specific range of CNT density with an acceptable ratio of semiconducting to metallic CNTs can be adjusted in a typical synthesis process.
机译:碳纳米管场效应晶体管(CNFET)有望成为未来集成电路的基础。然而,具有精确的手性和精确的定位控制的合成单壁碳纳米管(CNT)已被广泛认为是一项极其复杂的任务。实际上,CNT生长中的密度和手性变化会损害基于CNFET的电路的可靠性。在本文中,我们提出了一种新颖的统计紧凑模型,用于估计CNFET的故障概率,从而为千兆集成电路中的CNFET设计提供一些材料和工艺指导。我们在详细故障分析的框架内使用了测得的CNT间距分布,以证明CNT密度以及金属与半导体CNT的比率在确定CNFET的故障概率中起主要作用。此外,有人认为,只有在典型的合成过程中,只要能够调节特定范围的碳纳米管密度以及半导体与金属碳纳米管的可接受比率,这些器件在集成电路中的大规模集成才是可行的。

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