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Inhomogeneity in barrier height at graphene/Si (GaAs) Schottky junctions

机译:石墨烯/ Si(GaAs)肖特基结的势垒高度不均匀

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摘要

Graphene (Gr) interfaced with a semiconductor forms a Schottky junction with rectifying properties, however, fluctuations in the Schottky barrier height are often observed. In this work, Schottky junctions are fabricated by transferring chemical vapor deposited monolayer Gr onto n-type Si and GaAs substrates. Temperature dependence of the barrier height and ideality factor are obtained by current-voltage measurements between 215 and 350 K. An increase in the zero bias barrier height and decrease in the ideality factor are observed with increasing temperature for both junctions. Such behavior is attributed to barrier inhomogeneities that arise from interfacial disorders as revealed by scanning tunneling microscopy/spectroscopy. Assuming a Gaussian distribution of the barrier heights, mean values of 1.14 +/- 0.14 eV and 0.76 +/- 0.10 eV are found for Gr/Si and Gr/GaAs junctions, respectively. These findings resolve the origin of barrier height inhomogeneities in these Schottky junctions.
机译:与半导体连接的石墨烯(Gr)形成具有整流特性的肖特基结,但是,经常会观察到肖特基势垒高度的波动。在这项工作中,肖特基结是通过将化学气相沉积的单层Gr转移到n型Si和GaAs衬底上而制成的。通过在215至350 K之间进行电流-电压测量,可以获得势垒高度和理想因子的温度依赖性。随着两个结点温度的升高,零偏置势垒高度的增加和理想因子的减小都得到了观察。这种行为归因于由扫描隧道显微镜/光谱学揭示的界面紊乱引起的屏障不均匀性。假设势垒高度的高斯分布,对于Gr / Si和Gr / GaAs结,平均值分别为1.14 +/- 0.14 eV和0.76 +/- 0.10 eV。这些发现解决了这些肖特基结中势垒高度不均匀性的根源。

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