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首页> 外文期刊>電子情報通信学会技術研究報告. 集積回路. Integrated Circuits and Devices >Damascene metal gate transistor technology - reduction of threshold voltage deviation and salicide integration to damascene gate process
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Damascene metal gate transistor technology - reduction of threshold voltage deviation and salicide integration to damascene gate process

机译:镶嵌金属栅极晶体管技术-降低阈值电压偏差和硅化物集成到镶嵌栅极工艺中

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摘要

We proposed the Damascene gate process in order to apply metal gate materials and high-k gate dielectrics to 0.1μm node high performance transistors. However, the deviation of crystal orientation of TiN barrier metals was found to affect threshold voltages of the Damascene gate MOSFETs. Therefore, we developed an inorganic CVD technique in order to control the crystal Orientation of TiN film. By using this technique, threshold voltage deviation and transconductance were drastically improved. On the other hand, Co salicide films on source/drain are required to be thermally stable because high temperature process is performed after salicide formation in the Damascene gate process. The Damascene metal gate MOSFETs with Co silicided source/drain were successfully formed because the agglomeration of CoSi{sub}2 films was reduced by ion implantation through salicide technique.
机译:我们提出了镶嵌栅极工艺,以便将金属栅极材料和高k栅极电介质应用于0.1μm节点的高性能晶体管。但是,发现TiN势垒金属的晶体取向偏差会影响镶嵌栅极MOSFET的阈值电压。因此,我们开发了一种无机CVD技术来控制TiN膜的晶体取向。通过使用该技术,可以大大改善阈值电压偏差和跨导。另一方面,由于在镶嵌栅极工艺中的自对准硅化物形成之后执行高温工艺,所以要求源/漏极上的Co自对准硅化物膜是热稳定的。成功地形成了具有Co硅化的源极/漏极的镶嵌金属栅极MOSFET,这是因为通过自对准硅化物技术进行离子注入可以减少CoSi {sub} 2薄膜的团聚。

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