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Threading and Misfit-Dislocation Motion in Molecular-Beam Epitaxy-Grown HgCdTe Epilayers

机译:分子束外延生长的HgCdTe外延层中的穿线和错配位错运动

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Lattice mismatch between the substrate and the absorber layer in single-color HgCdTe infrared (IR) detectors and between bnad 1 and band 2 in two-color detectors results in the formation of crosshatch lines on the surface and an array of misfit dislocations at the epi-interfaces. Threading dislocations originating in the substrate can also bend into the interface plane and result in misfit dislocations because of the lattice mismatch. The existence of dislocations threading through the junction region of HgCdTe IR-photovoltaic detectors can greatly affect device performance. High-quality CdZnTe substrates and controlled molecular-beam epitaxy (MBE) growth of HgCdTe can result in very low threading-dislocation densities as measured by the etch-pit density (EPD approx 10~4 cm~(-2)). However, dislocation gettering to regions of high stress (such as etched holes, viods, and implanted-junction regions) at elevated-processing temperatures can results in a high density of dislocations in the junction region that can greatly reduce detector performance. We have performed experiments to determine if the dislocations that getter to these regions of high stress are misfit dislocations at the substrate/absorber interface that have a threading component extending to the upper surface of the epilayer, or if the dislocations originate at the cap/absorber interface as misfit dislocations. The preceding mechanisms for dislocation motion are discussed in detail, and the possible diode-performance consequences are explored.
机译:单色HgCdTe红外(IR)检测器中基板与吸收层之间的晶格失配以及双色HgCdTe红外(IR)检测器中的bnad 1和band 2之间的晶格失配会导致表面上的交叉影线形成并在Epi上形成一系列错配位错接口。源自衬底的螺纹位错也可能弯曲到界面平面中,并且由于晶格失配而导致失配位错。穿过HgCdTe红外光电探测器的结区的位错的存在会极大地影响器件性能。高质量的CdZnTe衬底和受控的HgCdTe分子束外延(MBE)生长可以导致通过刻蚀坑密度(EPD大约10〜4 cm〜(-2))测得的穿透位错密度非常低。但是,在升高的处理温度下,位错吸收到高应力区域(例如,蚀刻的孔,气泡和植入结的区域)会导致结区中的位错密度高,这会大大降低检测器的性能。我们已经进行了实验,以确定吸收到这些高应力区域的位错是否是具有延伸到外延层上表面的螺纹成分的基材/吸收体界面处的错位错位,还是该位错起源于帽/吸收体界面错位错位。详细讨论了用于位错运动的前述机制,并探讨了可能的二极管性能后果。

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