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An architecture for a DSP field-programmable gate array

机译:DSP现场可编程门阵列的架构

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This paper describes an application specific architecture fornfield-programmable gate arrays (FPGAs). Emphasis is placed on the logicnmodule architecture and channel segmentation for the FPGAs targeted fornapplication areas related to digital signal processing (DSP). Thenproposed logic module architecture is well-suited for efficientnimplementation of frequently used logic functions in the DSP applicationnarea. This is mainly because it is possible to implement most of thesenfunctions using one logic module, which results in a reduction in bothnthe net lengths and the number of antifuses used. The performancenimprovements are achieved by customizing the logic module architecturenand the programmable interconnect to suit the requirements of DSPnapplications
机译:本文描述了现场可编程门阵列(FPGA)的专用架构。重点放在针对与数字信号处理(DSP)相关的应用领域的FPGA的逻辑模块结构和通道分段上。提出的逻辑模块架构非常适合于DSP应用领域中常用逻辑功能的有效实现。这主要是因为可以使用一个逻辑模块来实现大多数功能,从而减少网络长度和使用的反熔丝数量。通过定制逻辑模块架构和可编程互连来满足DSPn应用程序的要求,可以提高性能。

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