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An architecture for a DSP field-programmable gate array

机译:DSP现场可编程门阵列的架构

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This paper describes an application specific architecture for field-programmable gate arrays (FPGAs). Emphasis is placed on the logic module architecture and channel segmentation for the FPGAs targeted for application areas related to digital signal processing (DSP). The proposed logic module architecture is well-suited for efficient implementation of frequently used logic functions in the DSP application area. This is mainly because it is possible to implement most of these functions using one logic module, which results in a reduction in both the net lengths and the number of antifuses used. The performance improvements are achieved by customizing the logic module architecture and the programmable interconnect to suit the requirements of DSP applications.
机译:本文介绍了现场可编程门阵列(FPGA)的专用架构。重点放在针对与数字信号处理(DSP)相关的应用领域的FPGA的逻辑模块架构和通道分段上。所提出的逻辑模块架构非常适合于DSP应用领域中常用逻辑功能的有效实现。这主要是因为可以使用一个逻辑模块来实现大多数这些功能,从而可以减少网络长度和使用的反熔丝数量。通过定制逻辑模块架构和可编程互连以适应DSP应用程序的要求,可以实现性能的提高。

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