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Integration of hierarchical test generation with behavioralsynthesis of controller and data path circuits

机译:集成层次测试生成与控制器和数据路径电路的行为综合

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This paper describes the first behavioral synthesis system thatnincorporates a hierarchical test generation approach to synthesizenarea-efficient and highly testable controller/data path circuits.nFunctional information of circuit modules is used during the synthesisnprocess to facilitate complete and easy testability of the data path.nThe controller behavior is taken into account while targeting data pathntestability. No direct controllability of the controller outputs throughnscan or otherwise is assumed. The test set for the combinedncontroller/data path is generated during synthesis in a very short time.nNear 100% testability of combined controller and data path is achieved.nThe synthesis system easily handles large bit-width data path circuitsnwith sequential loops and conditional branches in their behavioralnspecification, and scheduling constructs like multicycling, chaining andnstructural pipelining. An improvement of about three to four orders ofnmagnitude was usually obtained in the test generation time for thensynthesized benchmarks as compared to an efficient gate-level sequentialntest generator. The testability overheads are almost zero. Furthermore,nin many cases at-speed testing is also possible
机译:本文描述了第一个行为综合系统,该系统结合了分层测试生成方法来合成高效,可测试性高的控制器/数据路径电路.n在合成过程中使用电路模块的功能信息,以促进数据路径的完整且易于测试。在针对数据可测试性时要考虑到行为。假设不通过nscan或其他方式直接控制控制器输出。在很短的时间内就可以在综合过程中生成组合控制器/数据路径的测试集.n可以实现组合控制器和数据路径的接近100%的可测试性.n综合系统可以轻松处理大型位宽数据路径电路,并具有顺序循环和条件分支。它们的行为规范以及诸如多循环,链接和结构流水线的调度结构。与有效的门级顺序测试发生器相比,在随后的基准测试中,通常在测试生成时间内获得了大约三到四个数量级的改进。可测试性开销几乎为零。此外,在许多情况下,也可以进行全速测试

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