On the design of low-voltage, low-power CMOS analog multipliers forRF applications

摘要

Novel low-voltage, low-power techniques in the design of portablenwireless communication systems are required. Two system examples ofnlow-power analog multipliers operating from a 1.2 V supply arenpresented. These proposed structures achieve the required multiplicationnfunction by using current processing. The circuits were fabricated usingnstandard double-poly CMOS processes for a 900 MHz application.nMeasurement results of the prototypes are comparable to other highernvoltage designs