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Substrate coupling in digital circuits in mixed-signal smart-power systems

机译:混合信号智能电源系统中数字电路中的基板耦合

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This paper describes theoretical and experimental data characterizing the sensitivity of nMOS and CMOS digital circuits to substrate coupling in mixed-signal, smart-power systems. The work presented here focuses on the noise effects created by high-power analog circuits and affecting sensitive digital circuits on the same integrated circuit. The sources and mechanism of the noise behavior of such digital circuits are identified and analyzed. The results are obtained primarily from a set of dedicated test circuits specifically designed, fabricated, and evaluated for this work. The conclusions drawn from the theoretical and experimental analyses are used to develop physical and circuit design techniques to mitigate the substrate noise problems. These results provide insight into the noise immunity of digital circuits with respect to substrate coupling.
机译:本文描述了表征混合信号,智能电源系统中nMOS和CMOS数字电路对衬底耦合灵敏度的理论和实验数据。此处介绍的工作集中于大功率模拟电路产生的噪声影响,并影响同一集成电路上的敏感数字电路。识别并分析了这种数字电路的噪声行为的来源和机理。这些结果主要来自专门设计,制造和评估的一组专用测试电路。从理论和实验分析得出的结论可用于开发物理和电路设计技术,以减轻基板噪声问题。这些结果提供了关于数字电路相对于基板耦​​合的抗扰性的见解。

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