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Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation

机译:测试图案生成时不相关的电源噪声和接地反弹注意事项

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Power supply noise and ground bounce can cause considerable path delay variations. Capturing the worst case power supply noise at a gate level is not a sufficient indicator for measuring the worst case path delay. Furthermore, path delay variations depend on multiple parameters such as input stimuli, cell placement, switching frequency, and available decoupling capacitors. All these variables obscure the rapport between supply noise and path delay and make the selection of stimuli for worst case path delay a difficult task during test pattern generation. In this paper, we utilize power supply noise and ground bounce distribution along with physical design data to generate test patterns for capturing worst case path delay. We propose accurate close-form mathematical models for capturing the effect of power supply noise and ground bounce on path delay. These models are based on modified nodal analysis formulation of power and ground networks, where current waveforms are obtained from levelized simulation and cell library characterization. The proposed test pattern generation flow is a simulated-annealing-based iterative process, which utilizes mathematical models for capturing the impact of supply noise on path delay for a given input pattern. We perform experiments on ITC'99 benchmarks and show that path delay variation can be considerable if test patterns are not properly selected.
机译:电源噪声和接地反弹会导致较大的路径延迟变化。在门级捕获最坏情况的电源噪声不足以衡量最坏情况的路径延迟。此外,路径延迟变化取决于多个参数,例如输入刺激,单元放置,开关频率和可用的去耦电容器。所有这些变量掩盖了电源噪声和路径延迟之间的关系,并使选择最坏情况下的路径延迟的刺激成为测试图形生成期间的一项艰巨任务。在本文中,我们利用电源噪声和接地反弹分布以及物理设计数据来生成测试图案,以捕获最坏情况下的路径延迟。我们提出了精确的闭合形式数学模型,以捕获电源噪声和地面反弹对路径延迟的影响。这些模型基于电源和地面网络的修改后的节点分析公式,其中电流波形是通过分层仿真和单元库表征获得的。拟议的测试模式生成流程是基于模拟退火的迭代过程,该过程利用数学模型来捕获给定输入模式下电源噪声对路径延迟的影响。我们在ITC'99基准上进行了实验,结果表明,如果测试模式选择不当,路径延迟变化可能会很大。

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