Characterization of the Proximity Effect From Tungsten TSVs on 130-nm CMOS Devices in 3-D ICs

摘要

The proximity effect of tungsten-filled through-silicon-vias (TSVs) on the threshold voltage and mobility of CMOS devices due to mismatch in thermal expansion coefficients is modeled and verified with measurements. Test structures fabricated in a two-layer 130-nm CMOS 3-D integrated circuit process are measured and compared with 3-D finite element method simulations. Results show that the threshold voltage is not affected by TSVs, whereas mobility is affected by up to 10% for devices within 4 $mu{rm m}$ of a TSV.