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Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding

机译:基于输入的视频编码近似算术单元的动态重配置

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The field of approximate computing has received significant attention from the research community in the past few years, especially in the context of various signal processing applications. Image and video compression algorithms, such as JPEG, MPEG, and so on, are particularly attractive candidates for approximate computing, since they are tolerant of computing imprecision due to human imperceptibility, which can be exploited to realize highly power-efficient implementations of these algorithms. However, existing approximate architectures typically fix the level of hardware approximation statically and are not adaptive to input data. For example, if a fixed approximate hardware configuration is used for an MPEG encoder (i.e., a fixed level of approximation), the output quality varies greatly for different input videos. This paper addresses this issue by proposing a reconfigurable approximate architecture for MPEG encoders that optimizes power consumption with the goal of maintaining a particular Peak Signal-to-Noise Ratio (PSNR) threshold for any video. Toward this end, we design reconfigurable adder/subtractor blocks (RABs), which have the ability to modulate their degree of approximation, and subsequently integrate these blocks in the motion estimation and discrete cosine transform modules of the MPEG encoder. We propose two heuristics for automatically tuning the approximation degree of the RABs in these two modules during runtime based on the characteristics of each individual video. Experimental results show that our approach of dynamically adjusting the degree of hardware approximation based on the input video respects the given quality bound (PSNR degradation of 1%–10%) across different videos while achieving a power saving up to 38% over a conventional nonapproximated MPEG encoder architecture. Note that although the proposed reconfigurable approximate architecture is presented for the specific case of an MPEG encoder, it can be - asily extended to other DSP applications.
机译:在过去的几年中,尤其是在各种信号处理应用程序的背景下,近似计算领域已引起研究界的极大关注。图像和视频压缩算法(例如JPEG,MPEG等)是近似计算的特别有吸引力的候选对象,因为它们可以容忍由于人类的不可感知性而导致的计算不精确性,可以将其用于实现这些算法的高能效实现。但是,现有的近似体系结构通常静态地固定硬件近似的级别,并且不适应输入数据。例如,如果将固定的近似硬件配置用于MPEG编码器(即,固定的近似水平),则对于不同的输入视频,输出质量会有很大变化。本文通过为MPEG编码器提出一种可重新配置的近似体系结构来解决此问题,该体系结构可优化功耗,以维持任何视频的特定峰值信噪比(PSNR)阈值为目标。为此,我们设计了可重新配置的加法器/减法器块(RAB),它们具有调制其逼近度的能力,随后将这些块集成到MPEG编码器的运动估计和离散余弦变换模块中。我们提出了两种启发式方法,可以根据每个视频的特征在运行时自动调整这两个模块中RAB的近似度。实验结果表明,我们根据输入视频动态调整硬件逼近度的方法会在不同视频之间遵循给定的质量界限(PSNR下降1%–10%),与传统的非逼近技术相比,可节省多达38%的功耗MPEG编码器架构。注意,尽管提出的可重构近似体系结构是针对MPEG编码器的特定情况而提出的,但是它可以被轻松地扩展到其他DSP应用。

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