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A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications

机译:用于正电子发射断层扫描成像应用的100 ps时间分辨率CMOS时间数字转换器

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An integrated CMOS subnanosecond time-to-digital converter (TDC) has been developed and evaluated for positron emission tomography (PET) front-end applications. The TDC architecture combines an accurate digital counter and an analog time interpolation circuit to make the time interval measurement. The dynamic range of the TDC is programmable and can be easily extended without any timing resolution degradation. The converter was designed to operate over a reference clock frequency range of 62.5 MHz up to 100 MHz and can have a bin size as small as 312.5 ps LSB with 100-ns conversion times. Measurements indicate the TDC achieves a DNL of under ±0.20 LSB and INL less than ±0.30 LSB with an rms timing resolution of 0.312 LSB (97.5 ps), very close to the theoretical limit of 0.289 LSB (90 ps). The design is believed to be the first fully integrated CMOS subnanosecond TDC used in PET medical imaging and the first realization of a CMOS TDC that achieves an rms timing resolution below 100 ps within a 100-ns conversion time.
机译:已经开发出集成的CMOS亚纳秒时间数字转换器(TDC),并对其进行了正电子发射断层扫描(PET)前端应用的评估。 TDC架构结合了精确的数字计数器和模拟时间插值电路,可以进行时间间隔测量。 TDC的动态范围是可编程的,并且可以轻松扩展而不会降低任何时序分辨率。该转换器设计为可在62.5 MHz至100 MHz的参考时钟频率范围内工作,并具有100ns的转换时间,仓位尺寸小至312.5 ps LSB。测量表明,TDC的DNL值低于±0.20 LSB,INL低于±0.30 LSB,均方根时序分辨率为0.312 LSB(97.5 ps),非常接近理论极限0.289 LSB(90 ps)。该设计被认为是用于PET医学成像的第一个完全集成的CMOS亚纳秒TDC,并且是CMOS TDC的第一个实现,该CMOS TDC在100 ns的转换时间内实现低于100 ps的均方根时序分辨率。

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