首页> 外文期刊>IEEE Journal of Solid-State Circuits >Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology
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Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology

机译:采用0.18- $ muhbox m $ SiGe BiCMOS技术的40GSamples / s保持放大器的设计方法

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A 40-GSamples/s track and hold amplifier (THA) is designed and fabricated in 0.18-mum SiGe BiCMOS and operates from a 3.6-V supply. The total power consumption is 540 mW with a chip area of 1.1 mm2 . Time domain measurements demonstrate 40-GHz sampling and S-parameter measurements show a 3-dB bandwidth of 43 GHz in track mode. For 19-GHz input signals, a total harmonic distortion of -27 dB at the 1dB compression point has been measured and a spurious-free dynamic range of 35 dB has been achieved
机译:采用0.18微米SiGe BiCMOS设计和制造一个40 GSamples / s的跟踪保持放大器(THA),采用3.6V电源供电。芯片面积为1.1 mm2时,总功耗为540 mW。时域测量显示40 GHz采样,S参数测量显示在跟踪模式下3 dB带宽为43 GHz。对于19 GHz输入信号,在1dB压缩点处测得的总谐波失真为-27 dB,并且实现了35 dB的无杂散动态范围

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