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Integrable Quasivertical GaN U-Shaped Trench-Gate Metal-Oxide-Semiconductor Field-Effect Transistors for Power and Optoelectronic Integrated Circuits

机译:用于功率和光电集成电路的可集成准垂直GaN U形沟槽栅极金属氧化物半导体场效应晶体管

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摘要

Integrable, hexagonal-cell, high-voltage, quasivertical GaN power U-shaped trench-gate metal-oxide-semiconductor field-effect transistors (UMOSFETs) fabricated in the n+/p-+ GaN epilayers on sapphire substrates are experimentally demonstrated for the first time. Hexagonal cells, with pitch ranging from 11 to 20 μm, are used to obtain identicalm-plane sidewalls for gate and drain trenches. Metallization compatible with light-emitting diode (LED) optoelectronic integration is used. The dependence of device performance on different parameters is systematically studied and analyzed. The lowest Ron,sp of 23mΩ cm~2 and highest drain saturation current of 295 A cm~(-2) are obtained by measuring an 11 μmcell-pitch UMOSFET. The breakdown voltage of an open-cell design variation (208 V) is higher than that of a closed-cell design variation (89 V), whereas the closed-cell design exhibits a lower off-state leakage current of 1.4 × 10~(-5) A cm~(-2). A hexagonal-cell specific on-state resistance Rcell,sp of 8.5mΩ cm2 and buried nþ layer sheet resistance R_(BL,□) of 223 Ω□~(-1) are extracted by applying a 2D resistance network model to UMOSFETs of varying sizes.
机译:实验证明了在蓝宝石衬底上的n + / p / n- / n + GaN外延层中制造的可集成,六方晶胞,高电压,准四晶体GaN功率U形沟槽栅金属氧化物半导体场效应晶体管(UMOSFET)首次。间距在11至20μm之间的六边形单元用于获得栅极和漏极沟槽的相同m平面侧壁。使用与发光二极管(LED)光电集成兼容的金属化层。系统地研究和分析了器件性能对不同参数的依赖性。通过测量11μmcell-pitchUMOSFET,可获得最低的Ron,sp为23mΩcm〜2和最高的漏极饱和电流为295 A cm〜(-2)。开孔设计变型(208 V)的击穿电压高于闭孔设计变型(89 V)的击穿电压,而闭孔设计的关态漏电流较低,为1.4×10〜( -5)厘米〜(-2)。通过将二维电阻网络模型应用于变化的UMOSFET,提取六边形单元的特定通态电阻Rcell,sp为8.5mΩcm2,埋入的nþ层薄层电阻R_(BL,□)为223Ω□〜(-1)。大小。

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