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Monolithically Integrated GaN LED/Quasi-Vertical Power U-Shaped Trench-Gate MOSFET Pairs Using Selective Epi Removal

机译:使用选择性Epi去除的单片集成GaN LED /准垂直功率U形沟槽栅极MOSFET对

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We report on the demonstration of monolithically integrated light-emitting diode (LED) and quasi-vertical U-shaped trench-gate metal-oxide-semiconductor field-effect transistor (UMOSFET) in GaN. Selective epi removal (SER) approach was used on an LED-on-FET epi stack on sapphire substrates. Individual p-GaN layers were used for LED and FET in our design. LED light modulation by the supply voltage and the FET gate voltage was realized, and an integrated $350mu ext {m}imes {350}mu ext{m}$ LED/UMOSFET pair exhibits a light output power (LOP) of 4.9 W/cm(2) or 6.0 mW. An integrated device with a UMOSFET driving a 3-LED chain was also demonstrated. The normally-off power UMOSFET has a threshold voltage of 7 V, a breakdown voltage of 208 V, and a specific on-resistance of 23 $ext{m}Omega $ -cm(2), in which hexagonal cells were applied to obtain identical m-plane MOS gate interfaces. The effect of FET sizing on integrated pairs was also studied, and a trade-off model of FET/LED power ratio vs. FET/LED area ratio was created, which serves as universal criterion for FET/LED integration. The tested device with the best trade-off has FET/LED area ratio of 24 & x0025; and FET/LED power ratio of 56 & x0025;. This work creates a new building block for future GaN light-emitting integrated circuits (LEICs).
机译:我们报告了GaN中的单片集成发光二极管(LED)和准垂直U形沟槽栅金属氧化物半导体场效应晶体管(UMOSFET)的演示。在蓝宝石衬底上的FET上LED外延叠层上使用了选择性外延去除(SER)方法。在我们的设计中,单独的p-GaN层用于LED和FET。通过电源电压和FET栅极电压实现了LED光调制,并且集成的$ 350 mu text {m} times {350} mu text {m} $ LED / UMOSFET对显示出光输出功率(LOP )4.9 W / cm(2)或6.0 mW。还展示了具有驱动3-LED链的UMOSFET的集成器件。常关功率UMOSFET的阈值电压为7 V,击穿电压为208 V,比导通电阻为23 $ text {m} Omega $ -cm(2),其中应用了六边形单元获得相同的m平面MOS栅极接口。还研究了FET尺寸对集成对的影响,并建立了FET / LED功率比与FET / LED面积比的折衷模型,作为FET / LED集成的通用标准。权衡最佳的被测器件的FET / LED面积比为24&x0025; FET / LED功率比为56&x0025;。这项工作为未来的GaN发光集成电路(LEIC)创造了新的基础。

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