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首页> 外文期刊>Nanotechnology Magazine, IEEE >Advancing Electronic Packaging Using Microsolder Balls: Making 25-nm Pitch Interconnection Possible
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Advancing Electronic Packaging Using Microsolder Balls: Making 25-nm Pitch Interconnection Possible

机译:推进使用微焊球的电子封装:使25-nm间距互连成为可能

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摘要

Electronic packaging technology has advanced in the direction of integrating diverse components into one package to satisfy market demands for multifunctionality as well as portability [1], [2]. For this reason, various packaging structures have been introduced, such as multichip modules, package on package, package in package, and eventually three-dimensional (3-D)-chip stacks [3]?[6]. All of these approaches require increased input/output (I/O) counts, resulting in fine-pitch assembly [7], [8]. Therefore, the most critical issue in current electronic packaging is how to assemble fine-pitch components while avoiding an electrical short circuit in the x?y direction [8]?[12]. Much research has been done on fine-pitch interconnecting technology using microsolder balls smaller than 200 nm, but the problems of solder-ball handling and low yield remain [13]?[16]. In addition, there have been few reports so far about the fine-pitch interconnection below 25-nm pitch using microsolder balls. Three-dimensional-chip stacks require an additional microsolder and copper hybrid bumping and patterning processes on through silicon via (TSV), which increases the processing cost [7], [12], [17].
机译:电子封装技术已朝着将各种组件集成到一个封装中的方向发展,从而满足了市场对多功能性和便携性的需求[1],[2]。由于这个原因,已经引入了各种封装结构,例如多芯片模块,逐个封装,逐个封装,最后是三维(3-D)芯片堆叠[3]→[6]。所有这些方法都需要增加输入/输出(I / O)数量,从而实现了小间距装配[7],[8]。因此,当前电子封装中最关键的问题是如何组装细间距元件,同时避免在x?y方向上发生电短路[8]?[12]。对于使用小于200 nm的微焊球的细间距互连技术,已经进行了很多研究,但仍存在焊球处理和低成品率的问题[13]?[16]。此外,到目前为止,关于使用微焊料球在25nm以下的细间距互连的报道很少。三维芯片堆栈需要在硅通孔(TSV)上进行额外的微焊接和铜混合凸点和图案化工艺,从而增加了处理成本[7],[12],[17]。

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