Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA

摘要

Many electronic systems have to fulfill strict dependability properties, especially both fault tolerance and attack resistance. Intuitively, these requirements may seem to contradict each other. A study and an experiment description of the possible methods how to measure these impacts as well as result of first experiments are presented in this paper. Specifically, how basic passive hardware redundancy design methods affects resistance against differential power analysis attack and how the whole design can be modified to increase attack resistance will be discussed. (C) 2017 Elsevier B.V. All rights reserved.