机译:基于静态CMOS反相器设计逻辑门的具有新技术的新型低功耗全加法单元
Faculty of Electrical and Computer Engineering, Shahid Beheshti University GC, Tehran, Iran;
Science and research branch, Islamic Azad University, Tehran, Iran;
Faculty of Electrical and Computer Engineering, Shahid Beheshti University GC, Tehran, Iran;
Science and research branch, Islamic Azad University, Tehran, Iran;
Faculty of Electrical and Computer Engineering, Shahid Beheshti University GC, Tehran, Iran;
Science and research branch, Islamic Azad University, Tehran, Iran;
School of Electrical and Electronic Engineering, the University of Adelaide, Adelaide, SA 5005, Australia;
low-power full-adder; low-power CMOS design; inverter-based full-adder design; transmission gate;
机译:基于单电子CMOS反相器的AND / OR门设计1位全加器
机译:基于局部电荷的数值分析对基于CMOS反相器的纳米圆柱围栅MOSFET静态和动态性能的影响
机译:基于传输门的混合CMOS逻辑低功耗高速平衡XOR-XNOR电路的单元设计方法
机译:基于栅极触发的高效技术,用于设计具有极低毛刺功耗的静态CMOS IC
机译:CMOS有线接收器的低功耗技术。
机译:两个新颖的低功耗高速动态碳纳米管全加电池
机译:基于栅极触发的高效技术,用于设计具有极低毛刺功率耗散的静态CmOs IC