机译:SRAM器件和电路针对多V_(CMOS)的能源效率进行了优化
School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore,Institute of Microelectronics, Agency for Science, Technology and Research, 11 Science Park Road, Singapore 117685, Singapore;
Institute of Microelectronics, Agency for Science, Technology and Research, 11 Science Park Road, Singapore 117685, Singapore;
School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore;
CMOS memory circuits; SRAM; Energy minimization; Multi-V_(th); Leakage reduction; Power reduction;
机译:优化SRAM阵列结构以提高先进CMOS技术的能效
机译:电压优化可同时实现CMOS电路的能效和温度变化弹性
机译:基于FinFET的SRAM的稳健设计的器件电路协同优化
机译:在0.274 / spl mu / m / sup 2 / 6T-SRAM单元和高级CMOS逻辑电路中集成高三栅极器件和插入式Ta / sub x / N / sub y /栅极
机译:将逻辑和非易失性器件嵌入CMOS数字电路以提高能效
机译:基于Q学习的联合能量光谱效率优化包括多跳设备到设备通信
机译:高级CMOS技术能效改进SRAM阵列结构的优化